#include "trigConf.h" // Configure the Trigger Supervisor for production running int ConfigProduction(ClientData clientData,Tcl_Interp *interp,int argc,const char *argv[]) { SetTrigEnable("enable_trig1" , 1); SetTrigPrescale("prescale_trig1" , 0); SetTrigEnable("enable_trig2" , 1); SetTrigPrescale("prescale_trig2" , 50000); SetTrigEnable("enable_trig3" , 0); SetTrigPrescale("prescale_trig3" , 0); SetTrigEnable("enable_trig4" , 1); SetTrigPrescale("prescale_trig4" , 2000000); SetTrigEnable("enable_trig5" , 0); SetTrigPrescale("prescale_trig5" , 0); SetTrigEnable("enable_trig6" , 0); SetTrigPrescale("prescale_trig6" , 0); SetTrigEnable("enable_trig7" , 0); SetTrigPrescale("prescale_trig7" , 0); SetTrigEnable("enable_trig8" , 0); SetTrigPrescale("prescale_trig8" , 0); SetTrigEnable("enable_trig9" , 0); SetTrigPrescale("prescale_trig9" , 0); SetTrigEnable("enable_trig10" , 0); SetTrigPrescale("prescale_trig10" , 0); SetTrigEnable("enable_trig11" , 0); SetTrigPrescale("prescale_trig11" , 0); SetTrigEnable("enable_trig12" , 0); SetTrigPrescale("prescale_trig12" , 0); SetSyncEnable("sync_enable", 1); SetSyncPeriod("sync_period", 2000); SetScaler("scaler13" , OR_TRIGGER); SetScaler("scaler14" , LEVEL_1_ACCEPT); SetScaler("scaler15" , LATCHED_TRIGGER); SetScaler("scaler16" , SYNC_SCHEDULED); SetScaler("scaler17" , SYNC_FORCED); SetScaler("scaler18" , PROGRAM_1_EVENT); // Use standard MLU program StandardMLUProgram(); // Update MLU checkboxes Tcl_Evaluate("GetMLUValue"); return TCL_OK; } // Standard PrimEx Program for the TS MLU int StandardMLUProgram(void) { int i,k; int nbits; //--------------- Program MLU data ------------------- // Clear entire memory block for(i=0;i<4096;i++)TS_MLU[i] = 0x0; // The ROC code passed to the ROCs will encode trigger information in the // following way: The first 4 bits will specify the first trigger bit which // is set. For example, if trigger bits 2 and 3 are set the first 4 bits // of the ROC code would be 0y0010 specifying bit 2 was the first bit set. // The last two bits specify the number of trigger bits set. In the above // example this would be 2. If more than 3 bits are set, then these will // be 3. In this way, if both the 2 high bits of the ROC code are set, that // must be interpreted as "3 or more" trigger bits were set. // Set MLU bits for(i=1;i<4096;i++){ // ROC code will be bits 1-4 and 9-10 int roc_code = 0x0; for(k=0;k<12;k++){ if((i>>k)&0x01){ roc_code = k+1; break; } } nbits = 1; for(k++;k<12;k++)if((i>>k)&0x01)nbits++; if(nbits>3)nbits=3; roc_code |= nbits<<4; TS_MLU[i] |= 0x01 << 0; // Level 1 OK TS_MLU[i] |= 0x01 << 1; // Class 1 event TS_MLU[i] |= 0xFF << 8; // Level 1 accept pattern TS_MLU[i] |= roc_code << 16; // ROC code } return 0; }