/* * BusConfigurator.hh * * Created on: Dec 15, 2017 * Author: hovanes */ #ifndef VETROCAPP_SRC_BUSCONFIGURATOR_HH_ #define VETROCAPP_SRC_BUSCONFIGURATOR_HH_ #include #include #include #include #include #include extern "C" { #include "jvme.h" #include "vetrocLib.h" } #include #include #include #include #include #include #include #include #include namespace VETROC { class BusConfigurator { protected: // Vector containing the slot numbers that have VETROC board in them. std::vector slotsWithBoards; // Based address of the first board that gets calculated based on the smallest // slot number with a VETROC board. uint32_t firstBoardAddress; // Base address increment between the VETROC boards const uint32_t addressIncrement; DMA_MEM_ID dmaInputQueue; DMA_MEM_ID dmaOutputQueue; // Readout block level (should be 1) const static int blockLevel; // Pulser frequency for the VETROC board (define latching trigger rate / dwell time ) static double pulseFrequency; // Duty cycle of the trigger pulse static double dutyCycle; // Pulse width static unsigned pulseWidth; // Coincidence window between X and Y planes. static unsigned coincidenceWindow; public: BusConfigurator( std::vector slots, uint32_t addrInc ) : slotsWithBoards( slots ), firstBoardAddress( 0 ), addressIncrement( addrInc ), dmaInputQueue(), dmaOutputQueue() { std::cout << "Constructing BusConfigurator with increment " << std::hex << std::showbase << addrInc << std::endl; if ( slotsWithBoards.size() < 1 ) { std::stringstream errMsg; errMsg << "BusConfigurator::BusConfigurator : The list of slots with VETROC boards is empty"; throw std::runtime_error( errMsg.str() ); } vmeOpenDefaultWindows(); vmeBusLock(); this->setupBoards(); this->setupDMA(); } virtual ~BusConfigurator() { std::cout << "Destroying BusConfigurator" << std::endl; dmaPFreeAll(); vmeBusUnlock(); vmeCloseDefaultWindows(); } void setupBoards(); void setupDMA() { std::cout << "Setting up DMA " << std::endl; dmaInputQueue = dmaPCreate( "vmeIN", 40240, 500, 0 ); dmaOutputQueue = dmaPCreate( "vmeOUT", 0, 0, 0 ); dmaPReInitAll(); dmaPStatsAll(); vmeDmaConfig( 2, 5, 1 ); /* Optimal DMA configuration for the FADC250 */ } const uint32_t getAddressIncrement() const { return addressIncrement; } static const int getBlockLevel() { return blockLevel; } static unsigned getCoincidenceWindow() { return coincidenceWindow; } static void setCoincidenceWindow( unsigned coincidenceWindow ) { BusConfigurator::coincidenceWindow = coincidenceWindow; } static double getDutyCycle() { return dutyCycle; } static void setDutyCycle( double dutyCycle ) { BusConfigurator::dutyCycle = dutyCycle; } const uint32_t getFirstBoardAddress() const { return firstBoardAddress; } static double getPulseFrequency() { return pulseFrequency; } static void setPulseFrequency( double pulseFrequency ) { BusConfigurator::pulseFrequency = pulseFrequency; } const std::vector& getSlotsWithBoards() const { return slotsWithBoards; } DMA_MEM_ID getDMAInputQueue() const { return dmaInputQueue; } DMA_MEM_ID getDMAOutputQueue() const { return dmaOutputQueue; } static unsigned getPulseWidth() { return pulseWidth; } void setPulseWidth( unsigned pulseWidth ) { BusConfigurator::pulseWidth = pulseWidth; } }; } /* namespace VETROC */ #endif /* VETROCAPP_SRC_BUSCONFIGURATOR_HH_ */