/*************************************************************************
 *
 *  vme_vetroc1.c - TI-based triggered readout of VETROC.
 *
 *
 */

#define BLOCKLEVEL 100
#define BUFFERLEVEL 10

#define MAXVETROCDATA 1000
#define VETROC_SLOT 3

/* Define Interrupt source and address */
#define TI_MASTER
#define TI_READOUT TI_READOUT_EXT_POLL  /* Poll for available data, external triggers */
#define TI_ADDR    (21<<19)          /* GEO slot 4 */

/* Decision on whether or not to readout the TI for each block 
   - Comment out to disable readout 
*/
#define TI_DATA_READOUT

#define FIBER_LATENCY_OFFSET 0x4A  /* measured longest fiber length */

#include "dmaBankTools.h"
#include "tiprimary_list.c" /* source required for CODA */

#include "SIS3800.h"        /* scaler library */
#include "vetrocLib.h"      /* VETROC library */
#include "gtpLib.h"         /* GTP library */

#define SCAL_ADDR 0xab2000

int use_scaler=0;

static struct SIS3800CSREG *pScaler;

static unsigned int vetrocSlotMask=0;
int nvetroc=0;
unsigned long *tdcbuf;

/* Redefine tsCrate according to TI_MASTER or TI_SLAVE */
#ifdef TI_SLAVE
int tsCrate=0;
#else
#ifdef TI_MASTER
int tsCrate=1;
#endif
#endif


/* function prototype */
void rocTrigger(int arg);

/****************************************
 *  DOWNLOAD
 *****************Front Panel TRG***********************/
void
rocDownload()
{

  int res, mode, iflag;
  unsigned long laddr;


  /*****************
   *   TI SETUP
   *****************/
  int overall_offset=0x80;

#ifndef TI_DATA_READOUT
  /* Disable data readout */
  tiDisableDataReadout();
  /* Disable A32... where that data would have been stored on the TI */
  tiDisableA32();
#endif

  /* Set crate ID */
  tiSetCrateID(0x01); /* ROC 1 */

/*   tiSetTriggerSource(TI_TRIGGER_TSINPUTS); */
  tiSetTriggerSource(TI_TRIGGER_FPTRG);


  /* Set needed TS input bits */
  tiEnableTSInput( TI_TSINPUT_1 );

  /* Load the trigger table that associates 
     pins 21/22 | 23/24 | 25/26 : trigger1
     pins 29/30 | 31/32 | 33/34 : trigger2
  */
  tiLoadTriggerTable(0);

  tiSetTriggerHoldoff(4,4,1);

/*   /\* Set the sync delay width to 0x40*32 = 2.048us *\/ */
  tiSetSyncDelayWidth(0x54, 0x40, 1);

  /* Set the busy source to non-default value (no Switch Slot B busy) */
  tiSetBusySource(TI_BUSY_LOOPBACK,1);

/*   tiSetFiberDelay(10,0xcf); */

  
  printf("Block level = %d\n",BLOCKLEVEL);

  tiSetBlockLevel(BLOCKLEVEL);
  tiSetBlockBufferLevel(BUFFERLEVEL);

  tiSetBlockLimit(0);
  tiSetPrescale(0);

  tiStatus(0);

  /* scalers */

  pScaler = 0;

  if (use_scaler) {

    printf("Setting up pScaler - address 0x%x\n",SCAL_ADDR);

    res = vmeBusToLocalAdrs(0x39,(char *)SCAL_ADDR,(char **)&laddr);

    if (res != 0) {
      printf("Scaler: ERROR:  vmeBusToLocalAdrs: scaler at offset 0x%x address= 0x%x\n",SCAL_ADDR,laddr);
    } else {
      pScaler = (struct SIS3800CSREG *)laddr;

      vmeWrite32(&pScaler->reset,1);
      vmeWrite32(&pScaler->csr,0x7000fd00);
      vmeWrite32(&pScaler->enclk,1);
      mode = 1;
      vmeWrite32(&pScaler->csr,0x00000C00);
      vmeWrite32(&pScaler->csr,mode<<2);
      vmeWrite32(&pScaler->clear,1);

      printf("Scaler: Have setup and cleared \n");


    }

  }

  /* for VETROC */

  vetrocSlotMask=0;
  vetrocSlotMask |= (1<<VETROC_SLOT); /* Add it to the mask */
  printf("vetrocSlotMask=0x%08x\n",vetrocSlotMask);

  tdcbuf = (unsigned long *)malloc(MAXVETROCDATA*sizeof(unsigned long));

/* 0 = software synch-reset, FP input 1, internal clock */
  iflag = 0x020;  /* VXS 0x111, FP 1  0x020;  */

  nvetroc = vetrocInit((VETROC_SLOT<<19), 0x80000, 1, iflag);
  if (nvetroc <= 0) {
    printf("ERROR: no VETROC !!! \n");
  }  

  vetrocGSetProcMode(2000,2000);
  vetrocSetBlockLevel(VETROC_SLOT, BLOCKLEVEL);
  vetrocTriggerPulseWidth(VETROC_SLOT, 8000);
  vetrocLinkReset(VETROC_SLOT);
  //  vetrocReset(VETROC_SLOT, 0);
  //vetrocClear(VETROC_SLOT);

  //  vetrocSync(VETROC_SLOT); 

  vetrocStatus(VETROC_SLOT,0);

  /* for GTP */

  /* Initialize GTP.  NULL (arg 2) specifies library to access GTP through TI (I2C)
     to determine it's network hostname */
  /*gtpInit(0,NULL);

  // Clock source is Internal before prestart 
  gtpSetClockSource(GTP_CLK_CTRL_P0);
  gtpSetSyncSource(GTP_SD_SRC_SEL_SYNC);
  gtpSetTrig1Source(GTP_SD_SRC_SEL_TRIG1);
  gtpSetSource(2, 32);
  gtpSetSource(2, 33);
  gtpSetSource(2, 34);
  gtpSetSource(2, 35);
  gtpSetTriggerLatency(0);

  gtpSetTriggerClusterThreshold(1);

  //gtpEnableVmeSlotMask(vetrocSlotMask); - need to add this function to gtpLib, for no hardcoded to vme slot 6 (PP9)
  gtpPayloadTriggerEnable(0x0100);*/

  printf("rocDownload: User Download Executed\n");

}

/****************************************
 *  PRESTART
 ****************************************/
void
rocPrestart()
{
  tiSyncReset(1);
  usleep(1000);
  
  tiStatus(0);
  printf("rocPrestart: User Prestart Executed\n");

}

/****************************************
 *  GO
 ****************************************/
void
rocGo()
{
  vetrocStatus(VETROC_SLOT,0);
  //gtpStatus(0);
  /* Show the current block level */
  printf("%s: Current Block Level = %d\n",
	 __FUNCTION__,tiGetCurrentBlockLevel());
}    

/****************************************
 *  END
 ****************************************/
void
rocEnd()
{

  int islot;

  tiStatus(0);

  printf("rocEnd: Ended after %d blocks\n",tiGetIntCount());
  
}

/****************************************
 *  TRIGGER
 ****************************************/
void
rocTrigger(int evnum)
{
  int ii, islot, intcnt, type=0;
  int dCnt, idata, nwords=0;
  int itime, gbready, read_stat;
  unsigned int busytime,livetime;
  static int mycount=1;
  int debug=1;

  tiSetOutputPort(1,0,0,0);

  // BLOCKOPEN(evnum,BT_BANK,BLOCKLEVEL);

#ifdef TI_DATA_READOUT
  BANKOPEN(4,BT_UI4,0);

  vmeDmaConfig(2,5,1); 
  dCnt = tiReadBlock(dma_dabufp,80+(3*BLOCKLEVEL),1);
  if(dCnt<=0)
    {
      printf("No data or error.  dCnt = %d\n",dCnt);
    }
  else
    {
      dma_dabufp += dCnt;
    }
  BANKCLOSE;
#endif

  /* Bank for VETROC data */

  BANKOPEN(3,BT_UI4,0);

  /* Delay loop.  */

  /* int k = 0, m = 0;

  for(m=0; m<1; m++) {

    k = 4*k+1;

    } */

   /* Check for valid data in VETROC */

  read_stat = 0;

  for(itime=0; itime<1000; itime++) 
    {
      gbready = vetrocGBready();
      read_stat = (gbready == vetrocSlotMask);
      if (read_stat>0) break;
    }

  if (debug) 
    {
      printf("gbready = %d  read_stat = %d \n",gbready, read_stat);
      printf("vetrocSlotMask = %d \n",vetrocSlotMask);
    }
  
  if(read_stat>0) 
    { /* read the data here */
      
      nwords = vetrocReadFIFO(VETROC_SLOT, &tdcbuf[0], MAXVETROCDATA, 1); 
      *dma_dabufp++ = LSWAP(0xb0b0b0b4);
      *dma_dabufp++ = LSWAP(nwords);
      *dma_dabufp++ = LSWAP(read_stat);
      
      for (ii=0; ii<nwords; ii++) 
	{
	  
	  /*  int n = 0;
	  n = n++;
	  n = tdcbuf[ii]; */

	  *dma_dabufp++ = tdcbuf[ii];

	}

    }
  else 
    {
      printf("ERROR: Data not ready in event %d\n",tiGetIntCount());
      *dma_dabufp++ = LSWAP(0xda000bad);
    }

  //vetrocClear(VETROC_SLOT);


  BANKCLOSE;

  BANKOPEN(5,BT_UI4,0);

  *dma_dabufp++ = LSWAP(0xfb1b1b1b);  
  mycount++;
  *dma_dabufp++ = LSWAP(mycount);
  *dma_dabufp++ = LSWAP(tiGetIntCount());
  busytime = tiGetBusyTime();
  livetime = tiGetLiveTime();
  *dma_dabufp++ = LSWAP(busytime);  
  *dma_dabufp++ = LSWAP(livetime);  

  if (use_scaler && pScaler) {
   
     *dma_dabufp++ = LSWAP(0xb0b0b444);
     *dma_dabufp++ = LSWAP(vmeRead32(&pScaler->readCounter[8]));
     *dma_dabufp++ = LSWAP(vmeRead32(&pScaler->readCounter[9]));
     *dma_dabufp++ = LSWAP(vmeRead32(&pScaler->readCounter[10]));

  }
  BANKCLOSE;

  //BLOCKCLOSE;

  tiSetOutputPort(0,0,0,0);

  /*
  *dma_dabufp++ = LSWAP(0xfb0b0b0b);
  *dma_dabufp++ = LSWAP(0xfb0b4444);
  */
}

void
rocCleanup()
{
  int islot=0;

  printf("%s: Reset all FADCs\n",__FUNCTION__);
  
}