#FIG 3.2 Portrait Center Inches Letter 100.00 Single -2 1200 2 6 4800 975 9075 1200 4 0 0 50 0 0 18 0.0000 4 195 540 4800 1200 2004\001 4 0 0 50 0 0 18 0.0000 4 195 540 5400 1200 2005\001 4 0 0 50 0 0 18 0.0000 4 195 540 6075 1200 2006\001 4 0 0 50 0 0 18 0.0000 4 195 540 6675 1200 2007\001 4 0 0 50 0 0 18 0.0000 4 195 540 7275 1200 2008\001 4 0 0 50 0 0 18 0.0000 4 195 540 7875 1200 2009\001 4 0 0 50 0 0 18 0.0000 4 195 540 8475 1200 2010\001 -6 6 1200 1575 6075 2775 2 1 0 2 0 7 50 0 -1 0.000 0 0 7 0 0 2 5400 1950 5700 1950 2 1 0 2 0 7 50 0 -1 0.000 0 0 7 0 0 2 5700 2550 6000 2550 2 1 0 2 0 7 50 0 -1 0.000 0 0 7 0 0 2 5700 2250 6000 2250 4 0 0 50 0 0 18 0.0000 4 255 2115 1350 2100 Grounding scheme\001 4 0 0 50 0 0 18 0.0000 4 255 4125 1350 2400 Power requirements, AC distribution\001 4 0 0 50 0 0 18 0.0000 4 195 3750 1200 1800 Electrical Infrastructure in Hall D\001 4 0 0 50 0 0 18 0.0000 4 255 3060 1350 2700 (Rack) layout of electronics\001 -6 6 1200 3075 7875 4500 2 1 0 2 0 7 50 0 -1 0.000 0 0 7 0 0 2 5400 3450 6000 3450 2 1 0 2 0 7 50 0 -1 0.000 0 0 7 0 0 2 6000 3750 6600 3750 2 1 0 2 0 7 50 0 -1 0.000 0 0 7 0 0 2 6600 4050 7200 4050 2 1 0 2 0 7 50 0 -1 0.000 0 0 7 0 0 2 7200 4350 7800 4350 4 0 0 50 0 0 18 0.0000 4 255 1755 1200 3300 F1 TDC project\001 4 0 0 50 0 0 18 0.0000 4 225 2580 1350 4200 version II: test/evaluate\001 4 0 0 50 0 0 18 0.0000 4 255 3480 1350 3900 version II: design and prototype\001 4 0 0 50 0 0 18 0.0000 4 195 2190 1350 4500 F1 TDC fabrication\001 4 0 0 50 0 0 18 0.0000 4 255 3750 1350 3600 version I: install in existing setups\001 -6 2 1 0 2 0 7 50 0 -1 0.000 0 0 7 0 0 2 6600 5550 7200 5550 2 1 0 2 0 7 50 0 -1 0.000 0 0 7 0 0 2 6000 5250 6600 5250 4 0 0 50 0 0 18 0.0000 4 195 1020 6375 600 Timeline\001 4 0 0 50 0 0 18 0.0000 4 255 3480 900 600 Electronics (Jlab Contribution)\001 4 0 0 50 0 0 18 0.0000 4 255 1500 1200 5100 Trigger Logic\001 4 0 0 50 0 0 18 0.0000 4 255 1875 1350 5400 Trigger interface\001 4 0 0 50 0 0 18 0.0000 4 255 2115 1350 5700 Signal Distribution\001