#!/usr/bin/python

# check file "adc2strip.inp" to make sure all cables are 
# in the list





reflist = []

for FDC in range(1,5):
    for plane in range(1,7):
        for connector in range(1,10):
            for layer in range(0,2):
                s = str(FDC)+'-'+str(plane)+'-'+str(connector)+'-'+str(layer)
                reflist.append(s)

inf = 'adc2strip.inp'
outf = 'FDCchannels.h'

f = open(inf,'r')

outf = open(outf,'w')
outf.write( "// generated by cklist.py\n//\n\n" )
outf.write( "int Package[10][20][3];\n" )
outf.write( "int Plane[10][20][3];\n" )
outf.write( "int Connector[10][20][3];\n" )
outf.write( "int Layer[10][20][3];\n" )
outf.write( "\nvoid ArrayInit(){ \n" )

flist = []

ok = 1

ROC = 0
Rcnt = -1;
Scnt = 0

while ok:
    line = f.readline()
    if line == '':
        ok = 0
    else:
        s = line.split()
        if len(s)>1:
            for k in range(0,len(s)):
                #print s[k]
                t = s[k].split('-')
                st = "   Package["+str(Rcnt)+"]["+str(Scnt)+"]["+str(k)+"] = "+t[0]+";\n"
                outf.write(st)
                st = "   Plane["+str(Rcnt)+"]["+str(Scnt)+"]["+str(k)+"] = "+t[1]+";\n"
                outf.write(st)
                st = "   Connector["+str(Rcnt)+"]["+str(Scnt)+"]["+str(k)+"] = "+t[2]+";\n"
                outf.write(st)
                st = "   Layer["+str(Rcnt)+"]["+str(Scnt)+"]["+str(k)+"] = "+t[3]+";\n"
                outf.write(st)

                flist.append(s[k])
            Scnt +=1

        else:
            ROC = int(s[0])
            Rcnt += 1
            Scnt = 0


outf.write("}\n")


for s1 in reflist:
    found = 0
    for s2 in flist:
        if s1 == s2:
            found += 1

    if not found:
        print s1,"NOT FOUND"
    if found>1:
        print s1,"found ",found," times"