/*************************************************************************
 *
 *  vme_list.c - Library of routines for readout and buffering of 
 *                events using a JLAB Trigger Interface V3 (TI) with 
 *                a Linux VME controller.
 *
 */

/* Event Buffer definitions */
#define MAX_EVENT_POOL     10
#define MAX_EVENT_LENGTH   1024*60      /* Size in Bytes */

/* Define Interrupt source and address */
#define TI_MASTER
#define TI_READOUT TI_READOUT_EXT_POLL  /* Poll for available data, external triggers */
#define TI_ADDR    (21<<19)          /* GEO slot 21 */

/* Decision on whether or not to readout the TI for each block 
   - Comment out to disable readout 
*/
#define TI_DATA_READOUT

#define FIBER_LATENCY_OFFSET 0x4A  /* measured longest fiber length */

#include "dmaBankTools.h"
#include "tiprimary_list.c" /* source required for CODA */

#include "remexLib.h"
#include "f1tdcLib.h"

#define BLOCKLEVEL 1
#define BUFFERLEVEL 3

/* Redefine tsCrate according to TI_MASTER or TI_SLAVE */
#ifdef TI_SLAVE
int tsCrate=0;
#else
#ifdef TI_MASTER
int tsCrate=1;
#endif
#endif


extern int f1tdcA32Base;
extern int f1tdcA32Offset;
extern int nf1tdc;

#define F1TDC_ADDR (3<<19)

/* function prototype */
void rocTrigger(int arg);

/****************************************
 *  DOWNLOAD
 ****************************************/
void
rocDownload()
{

  /* Set up remex */
  remexSetCmsgServer("dafarm28");
  remexInit("dafarm42",0);
  
  /* Setup Address and data modes for DMA transfers
   *   
   *  vmeDmaConfig(addrType, dataType, sstMode);
   *
   *  addrType = 0 (A16)    1 (A24)    2 (A32)
   *  dataType = 0 (D16)    1 (D32)    2 (BLK32) 3 (MBLK) 4 (2eVME) 5 (2eSST)
   *  sstMode  = 0 (SST160) 1 (SST267) 2 (SST320)
   */
  vmeDmaConfig(2,5,1); 

  /*****************
   *   TI SETUP
   *****************/
  int overall_offset=0x80;

#ifndef TI_DATA_READOUT
  /* Disable data readout */
  tiDisableDataReadout();
  /* Disable A32... where that data would have been stored on the TI */
  tiDisableA32();
#endif

  /* Set crate ID */
  tiSetCrateID(0x01); /* ROC 1 */

  tiSetTriggerSource(TI_TRIGGER_TSINPUTS);

  /* Set needed TS input bits */
  tiEnableTSInput( TI_TSINPUT_3 );

  /* Load the trigger table that associates 
     pins 21/22 | 23/24 | 25/26 : trigger1
     pins 29/30 | 31/32 | 33/34 : trigger2
  */
  tiLoadTriggerTable(0);

  tiSetTriggerHoldoff(1,10,0);
  tiSetTriggerHoldoff(2,10,0);

  tiSetFiberDelay(1,2);
  tiSetSyncDelayWidth(1,0x3f,1);

  /* Set the busy source to non-default value (no Switch Slot B busy) */
  tiSetBusySource(TI_BUSY_LOOPBACK,1);

/*   tiSetFiberDelay(10,0xcf); */

  /* Set number of events per block */
  tiSetBlockLevel(BLOCKLEVEL);

  tiSetEventFormat(1);

  tiSetBlockBufferLevel(BUFFERLEVEL);


  tiStatus();

  /*****************
   *    F1 Setup 
   *****************/
  int iflag  = 0;
  iflag |= F1_SRSRC_VXS;   // SyncReset from VXS
  iflag |= F1_TRIGSRC_VXS; // Trigger from VXS
  iflag |= F1_CLKSRC_VXS;  // Clock from VXS

  f1tdcA32Base   = 0x09000000;

  f1Init(F1TDC_ADDR,(1<<19),18,iflag);

  f1GSetBlockLevel(BLOCKLEVEL);
  f1GEnableBusError();

  if(nf1tdc>1)
    f1EnableMultiBlock(1);

  sdInit();
  sdSetActiveVmeSlots(f1ScanMask()); /* Use the fadcSlotMask to configure the SD */
  sdStatus();

  int ii;
  for(ii=0; ii<nf1tdc; ii++)
    f1ResetToken(f1Slot(ii));

  f1GStatus(0);

  // Setup 1 microsec window and latency
/*   f1SetWindow(F1_SLOT,500,500,0xff); */
  
  f1ConfigShow(f1Slot(0),0);




  printf("rocDownload: User Download Executed\n");

}

/****************************************
 *  PRESTART
 ****************************************/
void
rocPrestart()
{
  unsigned short iflag;
  int stat;
  int islot;

  f1GStatus(0);
  tiStatus();

  printf("rocPrestart: User Prestart Executed\n");

}

/****************************************
 *  GO
 ****************************************/
void
rocGo()
{
  int islot;
  /* Enable modules, if needed, here */
  f1GEnableData(0xff);
  f1GEnable();

}

/****************************************
 *  END
 ****************************************/
void
rocEnd()
{

  int islot;

  f1GDisable();
  f1GStatus(0);
  tiStatus();

  printf("rocEnd: Ended after %d blocks\n",tiGetIntCount());
  
}

/****************************************
 *  TRIGGER
 ****************************************/
void
rocTrigger(int arg)
{
  int ii, islot;
  int stat, dCnt, len=0, idata;

  tiSetOutputPort(1,0,0,0);

  BANKOPEN(5,BT_UI4,0);
  *dma_dabufp++ = LSWAP(tiGetIntCount());
  *dma_dabufp++ = LSWAP(0xdead);
  *dma_dabufp++ = LSWAP(0xcebaf111);
  BANKCLOSE;

#ifdef TI_DATA_READOUT
  BANKOPEN(4,BT_UI4,0);

  vmeDmaConfig(2,5,1); 
  dCnt = tiReadBlock(dma_dabufp,8+(3*BLOCKLEVEL),1);
  if(dCnt<=0)
    {
      printf("No data or error.  dCnt = %d\n",dCnt);
    }
  else
    {
      dma_dabufp += dCnt;
    }

  BANKCLOSE;
#endif

  BANKOPEN(7,BT_UI4,0);
  unsigned int scanmask = f1ScanMask();
  /* f1 readout */
  for(ii=0;ii<100;ii++) 
    {
      stat = f1GBready();
      if (stat==scanmask) 
	{
	  break;
	}
    }

  if(stat==scanmask) 
    {
      dCnt = f1ReadBlock(f1Slot(0),dma_dabufp,4000,2);
      if(dCnt<=0)
	{
	  printf("No f1TDC data or error.  dCnt = %d\n",dCnt);
	}
      else
	{
	  dma_dabufp += dCnt;
	}
    }
  else
    {
      printf("%8d: Data not ready in f1TDC (stat = 0x%x, scanmask = 0x%x)\n",
	     tiGetIntCount(),stat,scanmask);
    }

  for(ii=0; ii<nf1tdc; ii++)
    f1ResetToken(f1Slot(ii));

  BANKCLOSE;

  tiSetOutputPort(0,0,0,0);

}

void
rocCleanup()
{
  int islot=0;

  remexClose();
  printf("%s: Reset all F1TDCs\n",__FUNCTION__);
  for(islot=0; islot<nf1tdc; islot++)
    {
      f1Reset(f1Slot(islot),0);
    }
  
}