#include #include #include "vtpLib.h" #include "si5341_cfg.h" #define SI5341_PARTNUM 0x5341 #define SI5341_CMD_SETADDR 0x00 #define SI5341_CMD_WRDATA 0x40 #define SI5341_CMD_RDDATA 0x80 static int currentPage = -1; static int spiid = -1; typedef struct { uint16_t address; /* 16-bit register address */ uint8_t value; /* 8-bit register data */ } si5341_revb_register_t; si5341_revb_register_t si5431_regs_local[] = { { 0x0B24, 0xD8 }, { 0x0B25, 0x00 }, { 0x000B, 0x74 }, { 0x0017, 0x30 }, { 0x0018, 0xFF }, { 0x0021, 0x0F }, { 0x0022, 0x00 }, { 0x002B, 0x02 }, { 0x002C, 0x20 }, { 0x002D, 0x00 }, { 0x002E, 0x00 }, { 0x002F, 0x00 }, { 0x0030, 0x00 }, { 0x0031, 0x00 }, { 0x0032, 0x00 }, { 0x0033, 0x00 }, { 0x0034, 0x00 }, { 0x0035, 0x00 }, { 0x0036, 0x00 }, { 0x0037, 0x00 }, { 0x0038, 0x00 }, { 0x0039, 0x00 }, { 0x003A, 0x00 }, { 0x003B, 0x00 }, { 0x003C, 0x00 }, { 0x003D, 0x00 }, { 0x0041, 0x00 }, { 0x0042, 0x00 }, { 0x0043, 0x00 }, { 0x0044, 0x00 }, { 0x009E, 0x00 }, { 0x0102, 0x01 }, { 0x0108, 0x06 }, { 0x0109, 0x09 }, { 0x010A, 0x3D }, { 0x010B, 0x00 }, { 0x010D, 0x06 }, { 0x010E, 0x09 }, { 0x010F, 0x3D }, { 0x0110, 0x02 }, { 0x0112, 0x01 }, { 0x0113, 0x09 }, { 0x0114, 0x3B }, { 0x0115, 0x00 }, { 0x0117, 0x06 }, { 0x0118, 0x09 }, { 0x0119, 0x3D }, { 0x011A, 0x02 }, { 0x011C, 0x01 }, { 0x011D, 0x09 }, { 0x011E, 0x3B }, { 0x011F, 0x00 }, { 0x0121, 0x06 }, { 0x0122, 0x09 }, { 0x0123, 0x3D }, { 0x0124, 0x01 }, { 0x0126, 0x01 }, { 0x0127, 0x09 }, { 0x0128, 0x3B }, { 0x0129, 0x00 }, { 0x012B, 0x06 }, { 0x012C, 0x09 }, { 0x012D, 0x3D }, { 0x012E, 0x00 }, { 0x0130, 0x06 }, { 0x0131, 0x09 }, { 0x0132, 0x3D }, { 0x0133, 0x01 }, { 0x013A, 0x01 }, { 0x013B, 0x09 }, { 0x013C, 0x3D }, { 0x013D, 0x00 }, { 0x013F, 0x00 }, { 0x0140, 0x00 }, { 0x0141, 0x40 }, { 0x0202, 0x00 }, { 0x0203, 0x00 }, { 0x0204, 0x00 }, { 0x0205, 0x00 }, { 0x0206, 0x00 }, { 0x0208, 0x00 }, { 0x0209, 0x00 }, { 0x020A, 0x00 }, { 0x020B, 0x00 }, { 0x020C, 0x00 }, { 0x020D, 0x00 }, { 0x020E, 0x00 }, { 0x020F, 0x00 }, { 0x0210, 0x00 }, { 0x0211, 0x00 }, { 0x0212, 0x00 }, { 0x0213, 0x00 }, { 0x0214, 0x00 }, { 0x0215, 0x00 }, { 0x0216, 0x00 }, { 0x0217, 0x00 }, { 0x0218, 0x00 }, { 0x0219, 0x00 }, { 0x021A, 0x00 }, { 0x021B, 0x00 }, { 0x021C, 0x00 }, { 0x021D, 0x00 }, { 0x021E, 0x00 }, { 0x021F, 0x00 }, { 0x0220, 0x00 }, { 0x0221, 0x00 }, { 0x0222, 0x00 }, { 0x0223, 0x00 }, { 0x0224, 0x00 }, { 0x0225, 0x00 }, { 0x0226, 0x00 }, { 0x0227, 0x00 }, { 0x0228, 0x00 }, { 0x0229, 0x00 }, { 0x022A, 0x00 }, { 0x022B, 0x00 }, { 0x022C, 0x00 }, { 0x022D, 0x00 }, { 0x022E, 0x00 }, { 0x022F, 0x00 }, { 0x0235, 0x00 }, { 0x0236, 0x00 }, { 0x0237, 0x00 }, { 0x0238, 0xA0 }, { 0x0239, 0x8C }, { 0x023A, 0x00 }, { 0x023B, 0x00 }, { 0x023C, 0x00 }, { 0x023D, 0x00 }, { 0x023E, 0x80 }, { 0x024A, 0x00 }, { 0x024B, 0x00 }, { 0x024C, 0x00 }, { 0x024D, 0x00 }, { 0x024E, 0x00 }, { 0x024F, 0x00 }, { 0x0250, 0x00 }, { 0x0251, 0x00 }, { 0x0252, 0x00 }, { 0x0253, 0x00 }, { 0x0254, 0x00 }, { 0x0255, 0x00 }, { 0x0256, 0x00 }, { 0x0257, 0x00 }, { 0x0258, 0x00 }, { 0x0259, 0x00 }, { 0x025A, 0x00 }, { 0x025B, 0x00 }, { 0x025C, 0x00 }, { 0x025D, 0x00 }, { 0x025E, 0x00 }, { 0x025F, 0x00 }, { 0x0260, 0x00 }, { 0x0261, 0x00 }, { 0x0262, 0x00 }, { 0x0263, 0x00 }, { 0x0264, 0x00 }, { 0x0268, 0x00 }, { 0x0269, 0x00 }, { 0x026A, 0x00 }, { 0x026B, 0x44 }, { 0x026C, 0x45 }, { 0x026D, 0x46 }, { 0x026E, 0x41 }, { 0x026F, 0x55 }, { 0x0270, 0x4C }, { 0x0271, 0x54 }, { 0x0272, 0x00 }, { 0x0302, 0x00 }, { 0x0303, 0x00 }, { 0x0304, 0x00 }, { 0x0305, 0x80 }, { 0x0306, 0x0D }, { 0x0307, 0x00 }, { 0x0308, 0x00 }, { 0x0309, 0x00 }, { 0x030A, 0x00 }, { 0x030B, 0x80 }, { 0x030D, 0x00 }, { 0x030E, 0x00 }, { 0x030F, 0x00 }, { 0x0310, 0x00 }, { 0x0311, 0x1B }, { 0x0312, 0x00 }, { 0x0313, 0x00 }, { 0x0314, 0x00 }, { 0x0315, 0x00 }, { 0x0316, 0xA0 }, { 0x0318, 0x00 }, { 0x0319, 0x00 }, { 0x031A, 0x00 }, { 0x031B, 0x70 }, { 0x031C, 0x08 }, { 0x031D, 0x00 }, { 0x031E, 0x00 }, { 0x031F, 0x00 }, { 0x0320, 0x00 }, { 0x0321, 0x80 }, { 0x0323, 0x00 }, { 0x0324, 0x00 }, { 0x0325, 0x00 }, { 0x0326, 0x00 }, { 0x0327, 0x00 }, { 0x0328, 0x00 }, { 0x0329, 0x00 }, { 0x032A, 0x00 }, { 0x032B, 0x00 }, { 0x032C, 0x00 }, { 0x032E, 0x00 }, { 0x032F, 0x00 }, { 0x0330, 0x00 }, { 0x0331, 0x00 }, { 0x0332, 0x00 }, { 0x0333, 0x00 }, { 0x0334, 0x00 }, { 0x0335, 0x00 }, { 0x0336, 0x00 }, { 0x0337, 0x00 }, { 0x0339, 0x1F }, { 0x033B, 0x00 }, { 0x033C, 0x00 }, { 0x033D, 0x00 }, { 0x033E, 0x00 }, { 0x033F, 0x00 }, { 0x0340, 0x00 }, { 0x0341, 0x00 }, { 0x0342, 0x00 }, { 0x0343, 0x00 }, { 0x0344, 0x00 }, { 0x0345, 0x00 }, { 0x0346, 0x00 }, { 0x0347, 0x00 }, { 0x0348, 0x00 }, { 0x0349, 0x00 }, { 0x034A, 0x00 }, { 0x034B, 0x00 }, { 0x034C, 0x00 }, { 0x034D, 0x00 }, { 0x034E, 0x00 }, { 0x034F, 0x00 }, { 0x0350, 0x00 }, { 0x0351, 0x00 }, { 0x0352, 0x00 }, { 0x0353, 0x00 }, { 0x0354, 0x00 }, { 0x0355, 0x00 }, { 0x0356, 0x00 }, { 0x0357, 0x00 }, { 0x0358, 0x00 }, { 0x0359, 0x00 }, { 0x035A, 0x00 }, { 0x035B, 0x00 }, { 0x035C, 0x00 }, { 0x035D, 0x00 }, { 0x035E, 0x00 }, { 0x035F, 0x00 }, { 0x0360, 0x00 }, { 0x0361, 0x00 }, { 0x0362, 0x00 }, { 0x090E, 0x02 }, { 0x091C, 0x04 }, { 0x0943, 0x00 }, { 0x0949, 0x00 }, { 0x094A, 0x00 }, { 0x0A02, 0x00 }, { 0x0A03, 0x07 }, { 0x0A04, 0x01 }, { 0x0A05, 0x07 }, { 0x0B44, 0x0F }, { 0x0B4A, 0x18 }, { 0x001C, 0x01 }, { 0x0B24, 0xDB }, { 0x0B25, 0x02 }, }; si5341_revb_register_t si5431_regs_vxs_250[] = { { 0x0B24, 0xD8 }, { 0x0B25, 0x00 }, { 0x000B, 0x74 }, { 0x0017, 0x32 }, { 0x0018, 0xF5 }, { 0x0021, 0x0B }, { 0x0022, 0x00 }, { 0x002B, 0x02 }, { 0x002C, 0x3A }, { 0x002D, 0x44 }, { 0x002E, 0x00 }, { 0x002F, 0x00 }, { 0x0030, 0xDE }, { 0x0031, 0x00 }, { 0x0032, 0x00 }, { 0x0033, 0x00 }, { 0x0034, 0xDE }, { 0x0035, 0x00 }, { 0x0036, 0x00 }, { 0x0037, 0x00 }, { 0x0038, 0xDE }, { 0x0039, 0x00 }, { 0x003A, 0x00 }, { 0x003B, 0x00 }, { 0x003C, 0xDE }, { 0x003D, 0x00 }, { 0x0041, 0x00 }, { 0x0042, 0x07 }, { 0x0043, 0x00 }, { 0x0044, 0x07 }, { 0x009E, 0x00 }, { 0x0102, 0x01 }, { 0x0108, 0x06 }, { 0x0109, 0x09 }, { 0x010A, 0x3D }, { 0x010B, 0x00 }, { 0x010D, 0x06 }, { 0x010E, 0x09 }, { 0x010F, 0x3D }, { 0x0110, 0x02 }, { 0x0112, 0x01 }, { 0x0113, 0x09 }, { 0x0114, 0x3B }, { 0x0115, 0x00 }, { 0x0117, 0x06 }, { 0x0118, 0x09 }, { 0x0119, 0x3D }, { 0x011A, 0x02 }, { 0x011C, 0x01 }, { 0x011D, 0x09 }, { 0x011E, 0x3B }, { 0x011F, 0x00 }, { 0x0121, 0x06 }, { 0x0122, 0x09 }, { 0x0123, 0x3D }, { 0x0124, 0x01 }, { 0x0126, 0x01 }, { 0x0127, 0x09 }, { 0x0128, 0x3B }, { 0x0129, 0x00 }, { 0x012B, 0x06 }, { 0x012C, 0x09 }, { 0x012D, 0x3D }, { 0x012E, 0x00 }, { 0x0130, 0x06 }, { 0x0131, 0x09 }, { 0x0132, 0x3D }, { 0x0133, 0x01 }, { 0x013A, 0x06 }, { 0x013B, 0x09 }, { 0x013C, 0x3D }, { 0x013D, 0x00 }, { 0x013F, 0x00 }, { 0x0140, 0x08 }, { 0x0141, 0x40 }, { 0x0202, 0x00 }, { 0x0203, 0x00 }, { 0x0204, 0x00 }, { 0x0205, 0x00 }, { 0x0206, 0x00 }, { 0x0208, 0x00 }, { 0x0209, 0x00 }, { 0x020A, 0x00 }, { 0x020B, 0x00 }, { 0x020C, 0x00 }, { 0x020D, 0x00 }, { 0x020E, 0x00 }, { 0x020F, 0x00 }, { 0x0210, 0x00 }, { 0x0211, 0x00 }, { 0x0212, 0x02 }, { 0x0213, 0x00 }, { 0x0214, 0x00 }, { 0x0215, 0x00 }, { 0x0216, 0x00 }, { 0x0217, 0x00 }, { 0x0218, 0x01 }, { 0x0219, 0x00 }, { 0x021A, 0x00 }, { 0x021B, 0x00 }, { 0x021C, 0x00 }, { 0x021D, 0x00 }, { 0x021E, 0x00 }, { 0x021F, 0x00 }, { 0x0220, 0x00 }, { 0x0221, 0x00 }, { 0x0222, 0x00 }, { 0x0223, 0x00 }, { 0x0224, 0x00 }, { 0x0225, 0x00 }, { 0x0226, 0x02 }, { 0x0227, 0x00 }, { 0x0228, 0x00 }, { 0x0229, 0x00 }, { 0x022A, 0x00 }, { 0x022B, 0x00 }, { 0x022C, 0x01 }, { 0x022D, 0x00 }, { 0x022E, 0x00 }, { 0x022F, 0x00 }, { 0x0235, 0x00 }, { 0x0236, 0x00 }, { 0x0237, 0x00 }, { 0x0238, 0x00 }, { 0x0239, 0x36 }, { 0x023A, 0x00 }, { 0x023B, 0x00 }, { 0x023C, 0x00 }, { 0x023D, 0x00 }, { 0x023E, 0x80 }, { 0x024A, 0x00 }, { 0x024B, 0x00 }, { 0x024C, 0x00 }, { 0x024D, 0x00 }, { 0x024E, 0x00 }, { 0x024F, 0x00 }, { 0x0250, 0x00 }, { 0x0251, 0x00 }, { 0x0252, 0x00 }, { 0x0253, 0x00 }, { 0x0254, 0x00 }, { 0x0255, 0x00 }, { 0x0256, 0x00 }, { 0x0257, 0x00 }, { 0x0258, 0x00 }, { 0x0259, 0x00 }, { 0x025A, 0x00 }, { 0x025B, 0x00 }, { 0x025C, 0x00 }, { 0x025D, 0x00 }, { 0x025E, 0x00 }, { 0x025F, 0x00 }, { 0x0260, 0x00 }, { 0x0261, 0x00 }, { 0x0262, 0x00 }, { 0x0263, 0x00 }, { 0x0264, 0x00 }, { 0x0268, 0x00 }, { 0x0269, 0x00 }, { 0x026A, 0x00 }, { 0x026B, 0x44 }, { 0x026C, 0x45 }, { 0x026D, 0x46 }, { 0x026E, 0x41 }, { 0x026F, 0x55 }, { 0x0270, 0x4C }, { 0x0271, 0x54 }, { 0x0272, 0x00 }, { 0x0302, 0x00 }, { 0x0303, 0x00 }, { 0x0304, 0x00 }, { 0x0305, 0x80 }, { 0x0306, 0x0D }, { 0x0307, 0x00 }, { 0x0308, 0x00 }, { 0x0309, 0x00 }, { 0x030A, 0x00 }, { 0x030B, 0x80 }, { 0x030D, 0x00 }, { 0x030E, 0x00 }, { 0x030F, 0x00 }, { 0x0310, 0x00 }, { 0x0311, 0x1B }, { 0x0312, 0x00 }, { 0x0313, 0x00 }, { 0x0314, 0x00 }, { 0x0315, 0x00 }, { 0x0316, 0xA0 }, { 0x0318, 0x00 }, { 0x0319, 0x00 }, { 0x031A, 0x00 }, { 0x031B, 0x70 }, { 0x031C, 0x08 }, { 0x031D, 0x00 }, { 0x031E, 0x00 }, { 0x031F, 0x00 }, { 0x0320, 0x00 }, { 0x0321, 0x80 }, { 0x0323, 0x00 }, { 0x0324, 0x00 }, { 0x0325, 0x00 }, { 0x0326, 0x00 }, { 0x0327, 0x00 }, { 0x0328, 0x00 }, { 0x0329, 0x00 }, { 0x032A, 0x00 }, { 0x032B, 0x00 }, { 0x032C, 0x00 }, { 0x032E, 0x00 }, { 0x032F, 0x00 }, { 0x0330, 0x00 }, { 0x0331, 0x00 }, { 0x0332, 0x00 }, { 0x0333, 0x00 }, { 0x0334, 0x00 }, { 0x0335, 0x00 }, { 0x0336, 0x00 }, { 0x0337, 0x00 }, { 0x0339, 0x1F }, { 0x033B, 0x00 }, { 0x033C, 0x00 }, { 0x033D, 0x00 }, { 0x033E, 0x00 }, { 0x033F, 0x00 }, { 0x0340, 0x00 }, { 0x0341, 0x00 }, { 0x0342, 0x00 }, { 0x0343, 0x00 }, { 0x0344, 0x00 }, { 0x0345, 0x00 }, { 0x0346, 0x00 }, { 0x0347, 0x00 }, { 0x0348, 0x00 }, { 0x0349, 0x00 }, { 0x034A, 0x00 }, { 0x034B, 0x00 }, { 0x034C, 0x00 }, { 0x034D, 0x00 }, { 0x034E, 0x00 }, { 0x034F, 0x00 }, { 0x0350, 0x00 }, { 0x0351, 0x00 }, { 0x0352, 0x00 }, { 0x0353, 0x00 }, { 0x0354, 0x00 }, { 0x0355, 0x00 }, { 0x0356, 0x00 }, { 0x0357, 0x00 }, { 0x0358, 0x00 }, { 0x0359, 0x00 }, { 0x035A, 0x00 }, { 0x035B, 0x00 }, { 0x035C, 0x00 }, { 0x035D, 0x00 }, { 0x035E, 0x00 }, { 0x035F, 0x00 }, { 0x0360, 0x00 }, { 0x0361, 0x00 }, { 0x0362, 0x00 }, { 0x090E, 0x00 }, { 0x091C, 0x03 }, { 0x0943, 0x00 }, { 0x0949, 0x0A }, { 0x094A, 0xA0 }, { 0x0A02, 0x00 }, { 0x0A03, 0x07 }, { 0x0A04, 0x01 }, { 0x0A05, 0x07 }, { 0x0B44, 0x0F }, { 0x0B4A, 0x18 }, { 0x001C, 0x01 }, { 0x0B24, 0xDB }, { 0x0B25, 0x02 }, }; si5341_revb_register_t si5431_regs_vxs_125[] = { { 0x0B24, 0xD8 }, { 0x0B25, 0x00 }, { 0x000B, 0x74 }, { 0x0017, 0x10 }, { 0x0018, 0xF5 }, { 0x0021, 0x0B }, { 0x0022, 0x00 }, { 0x002B, 0x02 }, { 0x002C, 0x3A }, { 0x002D, 0x44 }, { 0x002E, 0x00 }, { 0x002F, 0x00 }, { 0x0030, 0x6F }, { 0x0031, 0x00 }, { 0x0032, 0x00 }, { 0x0033, 0x00 }, { 0x0034, 0x6F }, { 0x0035, 0x00 }, { 0x0036, 0x00 }, { 0x0037, 0x00 }, { 0x0038, 0x6F }, { 0x0039, 0x00 }, { 0x003A, 0x00 }, { 0x003B, 0x00 }, { 0x003C, 0x6F }, { 0x003D, 0x00 }, { 0x0041, 0x00 }, { 0x0042, 0x06 }, { 0x0043, 0x00 }, { 0x0044, 0x06 }, { 0x009E, 0x00 }, { 0x0102, 0x01 }, { 0x0108, 0x06 }, { 0x0109, 0x09 }, { 0x010A, 0x3D }, { 0x010B, 0x00 }, { 0x010D, 0x06 }, { 0x010E, 0x09 }, { 0x010F, 0x3D }, { 0x0110, 0x02 }, { 0x0112, 0x01 }, { 0x0113, 0x09 }, { 0x0114, 0x3B }, { 0x0115, 0x00 }, { 0x0117, 0x06 }, { 0x0118, 0x09 }, { 0x0119, 0x3D }, { 0x011A, 0x02 }, { 0x011C, 0x01 }, { 0x011D, 0x09 }, { 0x011E, 0x3B }, { 0x011F, 0x00 }, { 0x0121, 0x06 }, { 0x0122, 0x09 }, { 0x0123, 0x3D }, { 0x0124, 0x01 }, { 0x0126, 0x01 }, { 0x0127, 0x09 }, { 0x0128, 0x3B }, { 0x0129, 0x00 }, { 0x012B, 0x06 }, { 0x012C, 0x09 }, { 0x012D, 0x3D }, { 0x012E, 0x00 }, { 0x0130, 0x06 }, { 0x0131, 0x09 }, { 0x0132, 0x3D }, { 0x0133, 0x01 }, { 0x013A, 0x02 }, { 0x013B, 0x09 }, { 0x013C, 0x3D }, { 0x013D, 0x00 }, { 0x013F, 0x00 }, { 0x0140, 0x08 }, { 0x0141, 0x40 }, { 0x0202, 0x00 }, { 0x0203, 0x00 }, { 0x0204, 0x00 }, { 0x0205, 0x00 }, { 0x0206, 0x00 }, { 0x0208, 0x00 }, { 0x0209, 0x00 }, { 0x020A, 0x00 }, { 0x020B, 0x00 }, { 0x020C, 0x00 }, { 0x020D, 0x00 }, { 0x020E, 0x00 }, { 0x020F, 0x00 }, { 0x0210, 0x00 }, { 0x0211, 0x00 }, { 0x0212, 0x01 }, { 0x0213, 0x00 }, { 0x0214, 0x00 }, { 0x0215, 0x00 }, { 0x0216, 0x00 }, { 0x0217, 0x00 }, { 0x0218, 0x01 }, { 0x0219, 0x00 }, { 0x021A, 0x00 }, { 0x021B, 0x00 }, { 0x021C, 0x00 }, { 0x021D, 0x00 }, { 0x021E, 0x00 }, { 0x021F, 0x00 }, { 0x0220, 0x00 }, { 0x0221, 0x00 }, { 0x0222, 0x00 }, { 0x0223, 0x00 }, { 0x0224, 0x00 }, { 0x0225, 0x00 }, { 0x0226, 0x01 }, { 0x0227, 0x00 }, { 0x0228, 0x00 }, { 0x0229, 0x00 }, { 0x022A, 0x00 }, { 0x022B, 0x00 }, { 0x022C, 0x01 }, { 0x022D, 0x00 }, { 0x022E, 0x00 }, { 0x022F, 0x00 }, { 0x0235, 0x00 }, { 0x0236, 0x00 }, { 0x0237, 0x00 }, { 0x0238, 0x00 }, { 0x0239, 0x36 }, { 0x023A, 0x00 }, { 0x023B, 0x00 }, { 0x023C, 0x00 }, { 0x023D, 0x00 }, { 0x023E, 0x80 }, { 0x024A, 0x00 }, { 0x024B, 0x00 }, { 0x024C, 0x00 }, { 0x024D, 0x00 }, { 0x024E, 0x00 }, { 0x024F, 0x00 }, { 0x0250, 0x00 }, { 0x0251, 0x00 }, { 0x0252, 0x00 }, { 0x0253, 0x00 }, { 0x0254, 0x00 }, { 0x0255, 0x00 }, { 0x0256, 0x00 }, { 0x0257, 0x00 }, { 0x0258, 0x00 }, { 0x0259, 0x00 }, { 0x025A, 0x00 }, { 0x025B, 0x00 }, { 0x025C, 0x00 }, { 0x025D, 0x00 }, { 0x025E, 0x00 }, { 0x025F, 0x00 }, { 0x0260, 0x00 }, { 0x0261, 0x00 }, { 0x0262, 0x00 }, { 0x0263, 0x00 }, { 0x0264, 0x00 }, { 0x0268, 0x01 }, { 0x0269, 0x00 }, { 0x026A, 0x00 }, { 0x026B, 0x44 }, { 0x026C, 0x45 }, { 0x026D, 0x46 }, { 0x026E, 0x41 }, { 0x026F, 0x55 }, { 0x0270, 0x4C }, { 0x0271, 0x54 }, { 0x0272, 0x00 }, { 0x0302, 0x00 }, { 0x0303, 0x00 }, { 0x0304, 0x00 }, { 0x0305, 0x80 }, { 0x0306, 0x0D }, { 0x0307, 0x00 }, { 0x0308, 0x00 }, { 0x0309, 0x00 }, { 0x030A, 0x00 }, { 0x030B, 0x80 }, { 0x030D, 0x00 }, { 0x030E, 0x00 }, { 0x030F, 0x00 }, { 0x0310, 0x00 }, { 0x0311, 0x1B }, { 0x0312, 0x00 }, { 0x0313, 0x00 }, { 0x0314, 0x00 }, { 0x0315, 0x00 }, { 0x0316, 0xA0 }, { 0x0318, 0x00 }, { 0x0319, 0x00 }, { 0x031A, 0x00 }, { 0x031B, 0x70 }, { 0x031C, 0x08 }, { 0x031D, 0x00 }, { 0x031E, 0x00 }, { 0x031F, 0x00 }, { 0x0320, 0x00 }, { 0x0321, 0x80 }, { 0x0323, 0x00 }, { 0x0324, 0x00 }, { 0x0325, 0x00 }, { 0x0326, 0x00 }, { 0x0327, 0x00 }, { 0x0328, 0x00 }, { 0x0329, 0x00 }, { 0x032A, 0x00 }, { 0x032B, 0x00 }, { 0x032C, 0x00 }, { 0x032E, 0x00 }, { 0x032F, 0x00 }, { 0x0330, 0x00 }, { 0x0331, 0x00 }, { 0x0332, 0x00 }, { 0x0333, 0x00 }, { 0x0334, 0x00 }, { 0x0335, 0x00 }, { 0x0336, 0x00 }, { 0x0337, 0x00 }, { 0x0339, 0x1F }, { 0x033B, 0x00 }, { 0x033C, 0x00 }, { 0x033D, 0x00 }, { 0x033E, 0x00 }, { 0x033F, 0x00 }, { 0x0340, 0x00 }, { 0x0341, 0x00 }, { 0x0342, 0x00 }, { 0x0343, 0x00 }, { 0x0344, 0x00 }, { 0x0345, 0x00 }, { 0x0346, 0x00 }, { 0x0347, 0x00 }, { 0x0348, 0x00 }, { 0x0349, 0x00 }, { 0x034A, 0x00 }, { 0x034B, 0x00 }, { 0x034C, 0x00 }, { 0x034D, 0x00 }, { 0x034E, 0x00 }, { 0x034F, 0x00 }, { 0x0350, 0x00 }, { 0x0351, 0x00 }, { 0x0352, 0x00 }, { 0x0353, 0x00 }, { 0x0354, 0x00 }, { 0x0355, 0x00 }, { 0x0356, 0x00 }, { 0x0357, 0x00 }, { 0x0358, 0x00 }, { 0x0359, 0x00 }, { 0x035A, 0x00 }, { 0x035B, 0x00 }, { 0x035C, 0x00 }, { 0x035D, 0x00 }, { 0x035E, 0x00 }, { 0x035F, 0x00 }, { 0x0360, 0x00 }, { 0x0361, 0x00 }, { 0x0362, 0x00 }, { 0x090E, 0x00 }, { 0x091C, 0x03 }, { 0x0943, 0x00 }, { 0x0949, 0x0A }, { 0x094A, 0xA0 }, { 0x0A02, 0x00 }, { 0x0A03, 0x07 }, { 0x0A04, 0x01 }, { 0x0A05, 0x07 }, { 0x0B44, 0x0F }, { 0x0B4A, 0x18 }, { 0x001C, 0x01 }, { 0x0B24, 0xDB }, { 0x0B25, 0x02 } }; int si5341_write(uint8_t addr, uint8_t data) { uint8_t wrBuf[4], rdBuf[4]; wrBuf[0] = SI5341_CMD_SETADDR; wrBuf[1] = addr; wrBuf[2] = SI5341_CMD_WRDATA; wrBuf[3] = data; vtpSpiTransfer(spiid, wrBuf, rdBuf, sizeof(wrBuf)); return OK; } int si5341_read(uint8_t addr, uint8_t *data) { uint8_t wrBuf[4], rdBuf[4]; wrBuf[0] = SI5341_CMD_SETADDR; wrBuf[1] = addr; wrBuf[2] = SI5341_CMD_RDDATA; wrBuf[3] = 0; vtpSpiTransfer(spiid, wrBuf, rdBuf, sizeof(wrBuf)); *data = rdBuf[3]; return OK; } void si5341_setPage(uint8_t page) { if(currentPage != page) { si5341_write(0x1, page); currentPage = page; } } void si5341_writeReg(uint16_t addr, uint8_t data) { si5341_setPage(addr>>8); si5341_write(addr & 0xFF, data); } uint8_t si5341_readReg(uint16_t addr) { uint8_t data = 0xFF; si5341_setPage(addr>>8); si5341_read(addr & 0xFF, &data); return data; } uint8_t si5341_readStatus(int print) { uint8_t status = si5341_readReg(0x0C); if(print) { printf("%s: status = %02X, %s\n", __func__, status, status ? "* ERROR *" : "OK"); printf("\tSYSINCAL %d, %s\n", (status>>0) & 0x1, ((status>>0) & 0x1) ? "* Calibrating *" : "OK"); printf("\tLOSXAXB %d, %s\n", (status>>1) & 0x1, ((status>>1) & 0x1) ? "* No Signal at XA pin *" : "OK"); printf("\tLOSREF %d, %s\n", (status>>2) & 0x1, ((status>>2) & 0x1) ? "* Phase Freq detector does nto have signal *" : "OK"); printf("\tLOL %d, %s\n", (status>>3) & 0x1, ((status>>3) & 0x1) ? "* DSPLL is out of lock *" : "OK"); printf("\tSMBUS_TIMEOUT %d, %s\n", (status>>4) & 0x1, ((status>>4) & 0x1) ? "* SMBus timeout error *" : "OK"); printf("\n"); } return status; } void si5341_dump_regs(uint16_t start, uint16_t stop) { uint16_t pos = start % 16; uint16_t pos_end = (stop + 16) % 16; uint8_t val; printf("si5341_dump: %d to %d:", start, stop); while(pos < pos_end) { if(!(pos % 16)) printf("\r\n0x%04X:", pos); if( (pos >= start) && (pos <= stop) ) { si5341_read(pos, &val); printf(" %02X", val); } else printf(" "); pos++; } printf("\r\n"); } int si5341_checkBasePart() { uint16_t partNum = 0; partNum = si5341_readReg(2); partNum |= si5341_readReg(3)<<8; printf("%s: ID=%04X\n", __func__, partNum); if(partNum != SI5341_PARTNUM) return ERROR; return OK; } void si5341_softReset() { si5341_writeReg(0x1C, 1); } void si5341_hardReset() { si5341_writeReg(0x1E, 2); } void si5341_sync() { si5341_writeReg(0x1E, 4); } void si5341_selectClockSource(int src) { si5341_writeReg(0x21, 0x1 | (src<<1)); } void si5341_delay(int dly) { volatile unsigned int i; while(dly--) for(i = 0; i < 100000; i++); } int si5341_configure(int src) { si5341_revb_register_t *pRegs = NULL; int len; si5341_hardReset(); si5341_delay(1000); si5341_softReset(); if(src == SI5341_IN_SEL_VXS_250) { pRegs = si5431_regs_vxs_250; len = sizeof(si5431_regs_vxs_250)/sizeof(si5431_regs_vxs_250[0]); } else if(src == SI5341_IN_SEL_VXS_125) { pRegs = si5431_regs_vxs_125; len = sizeof(si5431_regs_vxs_125)/sizeof(si5431_regs_vxs_125[0]); } else if(src == SI5341_IN_SEL_LOCAL) { pRegs = si5431_regs_local; len = sizeof(si5431_regs_local)/sizeof(si5431_regs_local[0]); } else { printf("%s: ERROR unknown clock source %d\r\n", __func__, src); return ERROR; } while(len--) { si5341_writeReg(pRegs->address, pRegs->value); si5341_delay(10); pRegs++; } si5341_sync(); return OK; } int si5341_Setup() { #ifdef SKIPTHIS /* 200MHz/16 => 12.5MHz bit rate */ //XSpiPs_SetClkPrescaler(&Spi, XSPIPS_CLK_PRESCALE_16); XSpiPs_SetClkPrescaler(&Spi, XSPIPS_CLK_PRESCALE_256); XSpiPs_SetOptions(&Spi, XSPIPS_MASTER_OPTION | XSPIPS_CLK_PHASE_1_OPTION | XSPIPS_CLK_ACTIVE_LOW_OPTION | XSPIPS_MANUAL_START_OPTION); XSpiPs_SetDelays(&Spi,0,2,0,0); #endif if(si5341_checkBasePart() != OK) return ERROR; return OK; } int si5341_Init(int src) { spiid = 0; if(si5341_Setup() != OK) return ERROR; si5341_delay(1000); si5341_configure(src); si5341_delay(1000); si5341_readStatus(1); si5341_delay(1000); return OK; } int si5341_Test() { int status, si5341_status; spiid = 0; printf("\n\n%s Started...\n", __func__); printf(" PS SPI setup..."); status = si5341_Setup(); printf("%s\n", (status == OK) ? "successful" : "failed"); if(status != OK) return ERROR; printf(" SI5341 Part ID check: "); status = si5341_checkBasePart(); printf("%s\n", (status == OK) ? "successful" : "failed"); if(status != OK) return ERROR; printf(" Checking VXS clock..."); si5341_configure(SI5341_IN_SEL_VXS); si5341_delay(1000); si5341_status = si5341_readStatus(0); status = (si5341_status != 0) ? ERROR : OK; printf("status=0x%02X, %s\n", si5341_status, (status == OK) ? "successful" : "failed"); if(status != OK) return ERROR; printf(" Checking LOCAL clock..."); si5341_configure(SI5341_IN_SEL_LOCAL); si5341_delay(1000); si5341_status = si5341_readStatus(0); status = (si5341_status != 0) ? ERROR : OK; printf("status=0x%02X, %s\n", si5341_status, (status == OK) ? "successful" : "failed"); if(status != OK) return ERROR; return OK; }