/**************************************************************************** * * fadc250Config.c - configuration library file for fADC250 board * * SP, 07-Nov-2013 * * empty lines and line startes with # - will be ignored * config file format: CRATE rocbcal1 <- ROC/crate name, usually IP name FADC250_ALLSLOTS <- just keyword - all settings after this line will be implemented # for all slots, till FADC250_SLOTS will be met FADC250_SLOTS 3 8 15 <- slot_numbers - in which next settings will be implemented # till file ends or next FADC250_SLOTS will be met FADC250_F_REV 0x0216 <- firmware revision (0x0 Bits:7-0) FADC250_B_REV 0x0908 <- board revision (0x0 Bits:15-8) FADC250_ID 0xfadc <- board type (0x0 Bits:31-16) # /---- slots ## # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 FADC250_ALLSN 0 0 ACDI-013 ACDI-014 ACDI-015 ACDI-016 ACDI-017 ACDI-002 ACDI-019 ACDI-020 0 0 B21595-19R ACDI-024 ACDI-025 ACDI-026 ACDI-027 ACDI-037 ACDI-038 ACDI-043 0 FADC250_SL_SN 7 ACDI-571 <- single board Serial Number: sl# , SN FADC250_MODE 1 <- process mode: 1-4 (0x10C Bits:2-0) FADC250_W_OFFSET 50 <- number of sample back from trigger point. (0x120) # (in Manual it is PL=Trigger_Window(ns) * 250MHz) FADC250_W_WIDTH 49 <- number of ADC sample to include in trigger window. (0x11C) # (in M: PTW=Trigger_Window(ns) * 250MHz, minimum is 6) FADC250_NSB 3 <- number of sample before trigger point to include in data processing. (0x124) # This include the trigger Point. (minimum is 2 in all mode) FADC250_NSA 6 <- number of sample after trigger point to include in data processing. (0x128) # Minimum is (6 in mode 2) and ( 3 in mode 0 and 1). # Number of sample report is 1 more for odd and 2 more for even NSA number. FADC250_NPEAK 1 <- number of Pulses in Mode 2 and 3. (0x10C Bits:6-5) # # 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 - channels ## FADC250_ADC_MASK 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 <- channel enable mask (0x110) FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- trigger enable mask # (channel includes in global trigger, if bit set to 1) # FADC250_TET 110 <- board Trigger Energy Threshold (TET), same for all 16 channels FADC250_CH_TET 0 110 <- channel# and TET_value for this channel FADC250_ALLCH_TET 111 222 2 3 4 5 6 7 8 9 10 11 12 13 14 15 <- 16 TETs (0x12C - 0x148) # FADC250_DAC 3300 <- board DAC, one and the same for all 16 channels FADC250_CH_DAC 0 3300 <- channel# and DAC_value for this channel FADC250_ALLCH_DAC 3300 3280 3310 3280 3310 3280 3310 3280 3300 3280 3300 3280 3310 3280 3310 3280 <- 16 DACs # FADC250_PED 210 <- board Pedestals, same for all channels FADC250_CH_PED 0 210 <- channel# and Pedestal_value for this channel FADC250_ALLCH_PED 210 220 210 215 215 220 220 210 210 215 215 220 220 210 215 220 <- 16 PEDs cc -rdynamic -shared -o fadc250Config.so fadc250Config.c -I/home/halld/test_setup/coda/linuxvme/include /home/halld/test_setup/coda/linuxvme/jvme/libjvme.a /home/halld/test_setup/coda/linuxvme/fadcV2/libfadc.a -ldl -lpthread -lrt /home/halld/test_setup/coda/linuxvme/fadcV2/fadcLib.c /home/halld/test_setup/coda/linuxvme/fadcV2/fadcLib.h */ #include #include #include #include "fadc250Config.h" #include "fadcLib.h" extern int nfadc; /* Number of FADC250s verified with the library */ extern int fadcID[FA_MAX_BOARDS]; /* Array of slot numbers, discovered by the library */ extern unsigned int fadcAddrList[FA_MAX_BOARDS]; /* Array of a24 addresses for FADCs */ extern volatile struct fadc_struct *FAp[(FA_MAX_BOARDS+1)]; /* pointers to FADC memory map */ static int iFlag; static int Naddr; static int AllSl; static FADC250_CONF fa250[NBOARD]; #define SCAN_MSK \ args = sscanf (str_tmp, "%*s %d %d %d %d %d %d %d %d \ %d %d %d %d %d %d %d %d", \ &msk[ 0], &msk[ 1], &msk[ 2], &msk[ 3], \ &msk[ 4], &msk[ 5], &msk[ 6], &msk[ 7], \ &msk[ 8], &msk[ 9], &msk[10], &msk[11], \ &msk[12], &msk[13], &msk[14], &msk[15]) #define SCAN_B_MSKS(BKEYWORD,BSTRUCT) \ else if(strcmp(keyword,(BKEYWORD)) == 0) \ { \ SCAN_MSK; \ ui1 = 0; \ for(jj=0; jj 1)) \ { \ printf("\nReadConfigFile: Wrong mask bit value, %d\n\n",msk[jj]); return(-7); \ } \ if(strcmp(keyword,"FADC250_ADC_MASK") == 0) msk[jj] = ~(msk[jj])&0x1; \ ui1 |= (msk[jj]<=NCHAN)) \ { \ printf("\nReadConfigFile: Wrong channel number %d, %s\n",slot,str_tmp); \ return(-8); \ } \ for(ii=3; ii%s<\n",fname); return(-1); } } else /* filename does not specified */ { sprintf(fname, "%s/fadc250/%s.cnf", halldparms, host); if((fd=fopen(fname,"r")) == NULL) { sprintf(fname, "%s/fadc250/default.cnf", halldparms); if((fd=fopen(fname,"r")) == NULL) { printf("\nReadConfigFile: Can't open config file >%s<\n",fname); return(-2); } } } printf("\nReadConfigFile: Using configuration file >%s<\n",fname); AllSl = 0; /* Parsing of config file */ while ((ch = getc(fd)) != EOF) { if ( ch == '#' || ch == ' ' || ch == '\t' ) { while (getc(fd) != '\n') {} } else if( ch == '\n' ) {} else { ungetc(ch,fd); fgets(str_tmp, STRLEN, fd); sscanf (str_tmp, "%s %s", keyword, ROC_name); /* Start parsing real config inputs */ if(strcmp(keyword,"CRATE") == 0) { if(strcmp(ROC_name,host) != 0) { printf("\nReadConfigFile: conf_CRATE_name = \"%s\" host = \"%s\"\n",ROC_name,host); printf("\nReadConfigFile: Wrong crate name in config file, %s\n",str_tmp); return(-3); } printf("\nReadConfigFile: conf_CRATE_name = %s host = %s\n",ROC_name,host); } else if(strcmp(keyword,"FADC250_ALLSLOTS") == 0) { AllSl = 1; gr++; for(ii=3; ii20) { printf("\nReadConfigFile: Wrong slot number %d, %s\n",slot,str_tmp); return(-4); } fa250[slot].group = gr; } } SCAN_B_XSETS("FADC250_F_REV", fa250[ii].f_rev) SCAN_B_XSETS("FADC250_B_REV", fa250[ii].b_rev) SCAN_B_XSETS("FADC250_ID", fa250[ii].b_ID) else if(strcmp(keyword,"FADC250_ALLSN") == 0) { args = sscanf (str_tmp, "%*s %s %s %s %s %s %s %s %s %s %s \ %s %s %s %s %s %s %s %s %s %s %s", &sn[ 1], &sn[ 2], &sn[ 3], &sn[ 4], &sn[ 5], &sn[ 6], &sn[ 7], &sn[ 8], &sn[ 9], &sn[10], &sn[11], &sn[12], &sn[13], &sn[14], &sn[15], &sn[16], &sn[17], &sn[18], &sn[19], &sn[20], &sn[21]); if(args != 21) { printf("\nReadConfigFile: Wrong number of SNs %d, should be 21 :: %s\n\n",args,str_tmp); return(-5); } for(ii=1; ii20) { printf("\nReadConfigFile: Wrong slot number %d, %s\n",slot,str_tmp); return(-6); } sprintf((char *)fa250[slot].SerNum, "%s", sn[0]); } SCAN_B_SETS("FADC250_MODE", fa250[ii].mode) SCAN_B_SETS("FADC250_W_OFFSET", fa250[ii].winOffset) SCAN_B_SETS("FADC250_W_WIDTH", fa250[ii].winWidth) SCAN_B_SETS("FADC250_NSB", fa250[ii].nsb) SCAN_B_SETS("FADC250_NSA", fa250[ii].nsa) SCAN_B_SETS("FADC250_NPEAK", fa250[ii].npeak) SCAN_B_MSKS("FADC250_ADC_MASK", fa250[ii].chDisMask) SCAN_B_MSKS("FADC250_TRG_MASK", fa250[ii].trigMask) SCAN_TDP("FADC250_TET",fa250[ii].thr) SCAN_TDP_CH("FADC250_CH_TET",fa250[ii].thr) SCAN_TDP_ALLCH("FADC250_ALLCH_TET",fa250[ii].thr) SCAN_TDP("FADC250_DAC",fa250[ii].dac) SCAN_TDP_CH("FADC250_CH_DAC",fa250[ii].dac) SCAN_TDP_ALLCH("FADC250_ALLCH_DAC",fa250[ii].dac) SCAN_TDP("FADC250_PED",fa250[ii].ped) SCAN_TDP_CH("FADC250_CH_PED",fa250[ii].ped) SCAN_TDP_ALLCH("FADC250_ALLCH_PED",fa250[ii].ped) } } fclose(fd); /* fill up fadcAddrList, to init only fadc250 from config file */ Naddr = 0; if(AllSl == 0) /* fill up only if FADC250_ALLSLOTS was not called */ for(ii=3; ii 0) { fadcAddrList[Naddr] = ii<<19; Naddr++; printf("\nReadConfigFile: ...fadcAddrList[%d] = 0x%08x group=%d\n", (Naddr-1),fadcAddrList[Naddr-1], fa250[ii].group); } /* for(ii=0; ii gg) { FA_SLOT = ii; printf("\nfadc250DownloadAll: FA_SLOT=%d fa250[%d].group=%d\n", FA_SLOT,ii,fa250[ii].group); faSetProcMode(FA_SLOT, fa250[ii].mode, fa250[ii].winOffset, fa250[ii].winWidth, fa250[ii].nsb, fa250[ii].nsa, fa250[ii].npeak, 0); faChanDisable( FA_SLOT, fa250[ii].chDisMask); for(jj=0; jjversion); b_ID = ((f_rev)&FA_BOARD_MASK)>>16; f_rev = (f_rev)&0xffff; b_rev = (vmeRead32(&(FAp[sl]->adc_status[0]))&0xFFFF)&FA_ADC_VERSION_MASK; adcConf[0] = (vmeRead32(&(FAp[sl]->adc_config[0]))&0xFFFF); adcConf[1] = (vmeRead32(&(FAp[sl]->adc_config[1]))&0xFFFF); mode = (adcConf[0]&FA_ADC_PROC_MASK) + 1; winOffset = (vmeRead32(&(FAp[sl]->adc_pl))&0xFFFF)*FA_ADC_NS_PER_CLK; winWidth = (vmeRead32(&(FAp[sl]->adc_ptw))&0xFFFF)*FA_ADC_NS_PER_CLK; nsb = (vmeRead32(&(FAp[sl]->adc_nsb))&0xFFFF)*FA_ADC_NS_PER_CLK; nsa = (vmeRead32(&(FAp[sl]->adc_nsa))&0xFFFF)*FA_ADC_NS_PER_CLK; for(jj=0; jjadc_pedestal[jj]) & FA_ADC_PEDESTAL_MASK; npeak = (adcConf[0]&FA_ADC_PEAK_MASK)>>4; chDisMask = (adcConf[1]&FA_ADC_CHAN_MASK); chEnaMask = ~(chDisMask)&0xFFFF; faGetSerialNumber(sl, (char **)&SerNum, 1); printf("\nFADC250 number %d in slot %d\n", ii, sl); printf(" Board Firmware Rev = 0x%04x\n", f_rev); printf(" ADC Processing Rev = 0x%04x\n", b_rev); printf(" Board Type/ID = 0x%04x\n", b_ID); printf(" Board Serial Number = %s ", SerNum); printf(", Conf.SN = %s\n", fa250[sl].SerNum); printf("\n ADC Processing Configuration: \n"); printf(" Channel Enable Mask = 0x%04x\n", chEnaMask); printf(" Window Offset (PL) = %d ns\n", winOffset); printf(" Window Width (PTW) = %d ns\n", winWidth); printf(" Time Before Peak = %d ns\n", nsb); printf(" Time After Peak = %d ns\n", nsa); printf(" Max Peak Count = %d \n", npeak); printf(" Mode = %d \n\n",mode); faPrintDAC(sl); printf("\n"); faPrintThreshold(sl); printf("\n Pedestal Settings for FADC in slot %d:",sl); for(jj=0; jj